1. Field of the Invention
The present invention relates to a nitride semiconductor substrate in which a nitride semiconductor layer is formed on a Si single crystal substrate through a buffer layer made of a nitride.
2. Description of the Related Art
Nitride semiconductors, such as gallium nitride (GaN), aluminum nitride (AlN), etc., have outstanding heat resistance and high electron mobility, and are suitable for a high electron mobility transistor, a heterojunction field effect transistor, etc.
An example of the nitride semiconductor substrate using the nitride semiconductor would be one in which a nitride semiconductor layer serving as an active layer is formed on a hetero-material substrate through a buffer layer. Especially one that uses a Si single crystal for the substrate is advantageous for a large-diameter wafer or cost reduction.
Further, important electrical properties of the nitride semiconductor are leak current reduction and current collapse to be improved. Some technologies are known in which the properties are improved by improving the buffer layer.
Japanese Patent Application Publication No. 2005-085852 discloses a technology of a nitride compound semiconductor having an electrode and a semiconductor stack structure comprising at least a substrate, a buffer layer, an electron transit layer, and an electron supply layer, in which the buffer layer contains Mg, Be, Zn, or C at a concentration of from 1×1016 to 1×1021 cm−3.
Japanese Patent Application Publication No. 2007-096261 discloses a technology of a semiconductor device comprising a low-temperature buffer layer, a buffer layer, an electron transit layer, and an electron supply layer which are each made of a GaN compound semiconductor and stacked on a substrate in that order, wherein an electron supply layer has thereon a source electrode, a gate electrode, and a drain electrode, and dislocation density of the buffer layer is a density where volume resistivity with respect to the dislocation density is close to the local maximum, or screw dislocation density ratio of the above-mentioned buffer layer on the basis of the above-mentioned dislocation density is 0.12 or less.
The technology described in Japanese Patent Application Publication No. 2005-085852 is such that a buffer layer includes a repetition structure of two layers having different thicknesses and compositions and the buffer layer is doped with Mg or C at a high concentration to be electrically neutral, thus reducing leak current.
However, if the buffer layer is doped with impurities at a high concentration, then crystal distortion becomes considerable and the dislocation density also increases, so that there arises a problem with the current collapse and crystallinity. Therefore, the doping alone does not allow sufficient improvement in the leak current reduction or the current collapse.
The technology described in Japanese Patent Application Publication No. 2007-096261 is such that, in particular, the ratio of the screw dislocation density to the total dislocation density of the buffer layer is set to 0.12 or less, so that the volume resistivity of the buffer layer may be of high resistance, to thereby improve the withstand voltage. Further, as a particular embodiment, it discloses data at the time of forming the nitride semiconductor on a sapphire substrate, and says that a material for the substrate is not limited to sapphire, but Si may be sufficient for it.
However, in the nitride semiconductor substrate having the structure where the nitride semiconductor layer is formed on the Si single crystal substrate through the buffer layer made of a nitride, even if the dislocation density and the dopant concentration are controlled to be within the range as described in Japanese Patent Application Publication No. 2007-096261, it is difficult to obtain a good withstand voltage and an improvement in current collapse.
Further, if the dislocation density and the dopant concentration are varied, the stress generating in the nitride film changes. Therefore, even if a good withstand voltage and a good current collapse are attained by varying the dislocation density and the dopant concentration, then the radius of curvature of the substrate decreases, this does not match with a device process but is out of object.